Status: FPGA Provenw
The UART core processes serial communications over a serial port. UARTs are now commonly included in Ethernet box. The UART core consists of a FPGA proven Cx code that provides all features necessary to communicate data through a RS-232 link.
The core provides the following features:
- Standard UART core
- Configurable data buffer
- No modem control signals (just TX and RX)
- Fully synchronous design
- Configurable baud rate
The general architecture of the core consists of four main modules:
- uartRx: this module receives and processes the data from the RS232 link
- uartTx: this module send the data to the RS232 link
- bufferRx: a small buffer between uartRX and the application
- bufferTx: a small buffer between the application and uartTx
The core is connected directly to the application. The application must be ready to receive data any time.
The project is done and FPGA proven.